Richard Barry 101806906d Rework RISC-V portASM.S to make it easier to add in chip specific RISC-V extensions and accommodate chips that don't include the CLINT.

2018-12-16 23:59:49 +00:00

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CLINT

Rework RISC-V portASM.S to make it easier to add in chip specific RISC-V extensions and accommodate chips that don't include the CLINT.

2018-12-16 23:59:49 +00:00

port.c

Save changes to the RISC-V port layer before making changes necessary to support pulpino too:

2018-12-16 20:21:29 +00:00

portASM.S

Rework RISC-V portASM.S to make it easier to add in chip specific RISC-V extensions and accommodate chips that don't include the CLINT.

2018-12-16 23:59:49 +00:00

portmacro.h

Save changes to the RISC-V port layer before making changes necessary to support pulpino too:

2018-12-16 20:21:29 +00:00