diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.cproject b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.cproject index baa18f1aab..5e22068fdb 100644 --- a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.cproject +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.cproject @@ -57,7 +57,7 @@ - diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.settings/language.settings.xml b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.settings/language.settings.xml index b1990cea13..48e342c5cc 100644 --- a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.settings/language.settings.xml +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.settings/language.settings.xml @@ -5,7 +5,7 @@ - + diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/FreeRTOSConfig.h b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/FreeRTOSConfig.h index 47d915a081..9f80763ca8 100644 --- a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/FreeRTOSConfig.h +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/FreeRTOSConfig.h @@ -20,7 +20,7 @@ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * * https://www.FreeRTOS.org - * https://aws.amazon.com/freertos + * https://github.com/FreeRTOS * */ @@ -47,8 +47,8 @@ #define configCPU_CLOCK_HZ ( 32768 ) #define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) #define configMAX_PRIORITIES ( 7 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 120 ) /* Only needs to be this high as some demo tasks also use this constant. In production only the idle task would use this. */ -#define configTOTAL_HEAP_SIZE ( ( size_t ) 10900 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) 10 * 1024 ) #define configMAX_TASK_NAME_LEN ( 16 ) #define configUSE_TRACE_FACILITY 0 #define configUSE_16_BIT_TICKS 0 diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/main.c b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/main.c index 45a87c0308..a8ebb68db0 100644 --- a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/main.c +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/main.c @@ -20,7 +20,7 @@ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * * https://www.FreeRTOS.org - * https://aws.amazon.com/freertos + * https://github.com/FreeRTOS * */ @@ -59,6 +59,17 @@ or 0 to run the more comprehensive test and demo application. */ #define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0 +/* Set to 1 to use direct mode and set to 0 to use vectored mode. + +VECTOR MODE=Direct --> all traps into machine mode cause the pc to be set to the +vector base address (BASE) in the mtvec register. + +VECTOR MODE=Vectored --> all synchronous exceptions into machine mode cause the +pc to be set to the BASE, whereas interrupts cause the pc to be set to the +address BASE plus four times the interrupt cause number. +*/ +#define mainVECTOR_MODE_DIRECT 0 + /* Index to first HART (there is only one). */ #define mainHART_0 0 @@ -70,6 +81,9 @@ or 0 to run the more comprehensive test and demo application. */ /*-----------------------------------------------------------*/ +extern void freertos_risc_v_trap_handler( void ); +extern void freertos_vector_table( void ); + /* * main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1. * main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0. @@ -118,7 +132,6 @@ int main( void ) #endif } /*-----------------------------------------------------------*/ - static void prvSetupHardware( void ) { struct metal_cpu *pxCPU; @@ -137,6 +150,16 @@ struct metal_interrupt *pxInterruptController; configASSERT( pxInterruptController ); metal_interrupt_init( pxInterruptController ); + #if( mainVECTOR_MODE_DIRECT == 1 ) + { + __asm__ volatile( "csrw mtvec, %0" :: "r"( freertos_risc_v_trap_handler ) ); + } + #else + { + __asm__ volatile( "csrw mtvec, %0" :: "r"( ( uintptr_t )freertos_vector_table | 0x1 ) ); + } + #endif + /* Set all interrupt enable bits to 0. */ mainPLIC_ENABLE_0 = 0UL; mainPLIC_ENABLE_1 = 0UL; @@ -248,6 +271,22 @@ volatile uint32_t ulMEPC = 0UL, ulMCAUSE = 0UL, ulPLICPending0Register = 0UL, ul } /*-----------------------------------------------------------*/ +void freertos_risc_v_application_interrupt_handler( uint32_t ulMcause ) +{ + ( void )ulMcause; + + handle_trap(); +} +/*-----------------------------------------------------------*/ + +void freertos_risc_v_application_exception_handler( uint32_t ulMcause ) +{ + ( void )ulMcause; + + handle_trap(); +} +/*-----------------------------------------------------------*/ + void vToggleLED( void ) { metal_led_toggle( pxBlueLED ); diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/vector_table.S b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/vector_table.S new file mode 100644 index 0000000000..805b2bc178 --- /dev/null +++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/vector_table.S @@ -0,0 +1,98 @@ +/* + * FreeRTOS V202112.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +.extern freertos_risc_v_exception_handler +.extern freertos_risc_v_interrupt_handler +.extern freertos_risc_v_mtimer_interrupt_handler + +.balign 128, 0 +.option norvc +.global freertos_vector_table +freertos_vector_table: +IRQ_0: + j freertos_risc_v_exception_handler +IRQ_1: + j freertos_risc_v_interrupt_handler +IRQ_2: + j freertos_risc_v_interrupt_handler +IRQ_3: + j freertos_risc_v_interrupt_handler +IRQ_4: + j freertos_risc_v_interrupt_handler +IRQ_5: + j freertos_risc_v_interrupt_handler +IRQ_6: + j freertos_risc_v_interrupt_handler +IRQ_7: + j freertos_risc_v_mtimer_interrupt_handler +IRQ_8: + j freertos_risc_v_interrupt_handler +IRQ_9: + j freertos_risc_v_interrupt_handler +IRQ_10: + j freertos_risc_v_interrupt_handler +IRQ_11: + j freertos_risc_v_interrupt_handler +IRQ_12: + j freertos_risc_v_interrupt_handler +IRQ_13: + j freertos_risc_v_interrupt_handler +IRQ_14: + j freertos_risc_v_interrupt_handler +IRQ_15: + j freertos_risc_v_interrupt_handler +IRQ_LC0: + j freertos_risc_v_interrupt_handler +IRQ_LC1: + j freertos_risc_v_interrupt_handler +IRQ_LC2: + j freertos_risc_v_interrupt_handler +IRQ_LC3: + j freertos_risc_v_interrupt_handler +IRQ_LC4: + j freertos_risc_v_interrupt_handler +IRQ_LC5: + j freertos_risc_v_interrupt_handler +IRQ_LC6: + j freertos_risc_v_interrupt_handler +IRQ_LC7: + j freertos_risc_v_interrupt_handler +IRQ_LC8: + j freertos_risc_v_interrupt_handler +IRQ_LC9: + j freertos_risc_v_interrupt_handler +IRQ_LC10: + j freertos_risc_v_interrupt_handler +IRQ_LC11: + j freertos_risc_v_interrupt_handler +IRQ_LC12: + j freertos_risc_v_interrupt_handler +IRQ_LC13: + j freertos_risc_v_interrupt_handler +IRQ_LC14: + j freertos_risc_v_interrupt_handler +IRQ_LC15: + j freertos_risc_v_interrupt_handler