diff --git a/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/CreateProjectDirectoryStructure.bat b/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/CreateProjectDirectoryStructure.bat new file mode 100644 index 0000000000..7a628ed359 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/CreateProjectDirectoryStructure.bat @@ -0,0 +1,59 @@ +REM This file should be executed from the command line prior to the first +REM build. It will be necessary to refresh the Eclipse project once the +REM .bat file has been executed (normally just press F5 to refresh). + +REM Copies all the required files from their location within the standard +REM FreeRTOS directory structure to under the Eclipse project directory. +REM This permits the Eclipse project to be used in 'managed' mode and without +REM having to setup any linked resources. + +REM Standard paths +SET FREERTOS_SOURCE=..\..\Source +SET COMMON_SOURCE=..\Common\minimal +SET COMMON_INCLUDE=..\Common\include + +REM Have the files already been copied? +IF EXIST RTOSDemo\FreeRTOS_Source Goto END + + REM Create the required directory structure. + MD RTOSDemo\FreeRTOS_Source + MD RTOSDemo\FreeRTOS_Source\include + MD RTOSDemo\FreeRTOS_Source\portable + MD RTOSDemo\FreeRTOS_Source\portable\GCC + MD RTOSDemo\FreeRTOS_Source\portable\GCC\ARM_CM3 + MD RTOSDemo\FreeRTOS_Source\portable\MemMang + MD RTOSDemo\Common-Demo-Source + MD RTOSDemo\Common-Demo-Source\include + + REM Copy the core kernel files into the project directory + copy %FREERTOS_SOURCE%\tasks.c RTOSDemo\FreeRTOS_Source + copy %FREERTOS_SOURCE%\queue.c RTOSDemo\FreeRTOS_Source + copy %FREERTOS_SOURCE%\list.c RTOSDemo\FreeRTOS_Source + copy %FREERTOS_SOURCE%\timers.c RTOSDemo\FreeRTOS_Source + + REM Copy the common header files into the project directory + copy %FREERTOS_SOURCE%\include\*.* RTOSDemo\FreeRTOS_Source\include + + REM Copy the portable layer files into the project directory + copy %FREERTOS_SOURCE%\portable\GCC\ARM_CM3\*.* RTOSDemo\FreeRTOS_Source\portable\GCC\ARM_CM3 + + REM Copy the memory allocation files into the project directory + copy %FREERTOS_SOURCE%\portable\MemMang\heap_4.c RTOSDemo\FreeRTOS_Source\portable\MemMang + + REM Copy the files that define the common demo tasks. + copy %COMMON_SOURCE%\dynamic.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\BlockQ.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\flash_timer.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\death.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\blocktim.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\semtest.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\PollQ.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\GenQTest.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\recmutex.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\countsem.c RTOSDemo\Common-Demo-Source + copy %COMMON_SOURCE%\integer.c RTOSDemo\Common-Demo-Source + + REM Copy the common demo file headers. + copy %COMMON_INCLUDE%\*.h RTOSDemo\Common-Demo-Source\include + +: END diff --git a/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/RTOSDemo.stp b/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/LiberoOutput/RTOSDemo.stp similarity index 100% rename from FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/RTOSDemo.stp rename to FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/LiberoOutput/RTOSDemo.stp diff --git a/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/LiberoOutput/RTOSDemo_DataSheet.xml b/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/LiberoOutput/RTOSDemo_DataSheet.xml new file mode 100644 index 0000000000..ea32d5402d --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/LiberoOutput/RTOSDemo_DataSheet.xml @@ -0,0 +1,2223 @@ + + + +
RTOSDemo
+ + SmartFusion2 + M2S050T_ES + 896 FBGA + STD + 1.2 + Verilog + + + c:/dev/FreeRTOS/SmartFustion2/Libero/RTOSDemo/component/work/RTOSDemo + GENERATED ( Sun May 05 13:23:22 2013 ) + SoftConsole workspace generated to c:\dev\FreeRTOS\SmartFustion2\Libero\RTOSDemo\SoftConsole + + + + + HDL File(s) + c:\dev\FreeRTOS\SmartFustion2\Libero\RTOSDemo\component\Actel\SgCore\OSC\1.0.100\osc_comps.v + c:\dev\FreeRTOS\SmartFustion2\Libero\RTOSDemo\component\work\RTOSDemo\FCCC_0\RTOSDemo_FCCC_0_FCCC.v + c:\dev\FreeRTOS\SmartFustion2\Libero\RTOSDemo\component\work\RTOSDemo\OSC_0\RTOSDemo_OSC_0_OSC.v + c:\dev\FreeRTOS\SmartFustion2\Libero\RTOSDemo\component\work\RTOSDemo\RTOSDemo.v + c:\dev\FreeRTOS\SmartFustion2\Libero\RTOSDemo\component\work\RTOSDemo_MSS\RTOSDemo_MSS.v + c:\dev\FreeRTOS\SmartFustion2\Libero\RTOSDemo\component\work\RTOSDemo_MSS\RTOSDemo_MSS_tmp_syn.v + + + GPIO_0_M2F + N/A + - + + + GPIO_8_F2M + IN + - + + + GPIO_1_M2F + N/A + - + + + MMUART_0_RXD + IN + - + + + MMUART_0_TXD + N/A + - + + + IP + SpiritModule + Actel + SgCore + FCCC + 2.0.100 + "SmartFusion2 Clock Conditioning Circuit (CCC)" + FCCC_0 + + + IP + SpiritModule + Actel + SgCore + OSC + 1.0.100 + + + OSC_0 + + + ComponentModule + HierSpiritDesign + c:/dev/FreeRTOS/SmartFustion2/Libero/RTOSDemo/component/work/RTOSDemo_MSS + RTOSDemo_MSS_0 + + + IP + FirmWareModule + Actel + Firmware + SmartFusion2_CMSIS + 2.1.101 + SmartFusion2 Cortex Microcontroller Software Interface Standard (CMSIS). + +The firmware package provides: +- Cortex-M3 startup code. +- CMSIS standard naming for exception and interrupt handlers. +- CMSIS standard functions for controlling the Cortex-M3 Nested Vectored Interrupt Controller (NVIC). +- peripherals registers description. +- hardware abstraction layer (HAL) for FPGA fabric soft-IP peripherirals. + +These files are required by the SmartFusion2 bare metal peripheral drivers to build correctly. + + + Software Tool Chain: + SoftConsole + ToolChain + 0 + actel-cc:variantParameter + + SmartFusion2_CMSIS_0 + + + IP + FirmWareModule + Actel + Firmware + SmartFusion2_MSS_GPIO_Driver + 2.0.101 + SmartFusion2 microcontroller subsystem (MSS) GPIO bare metal software driver. + +This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly. + SmartFusion2_MSS_GPIO_Driver_0 + + + IP + FirmWareModule + Actel + Firmware + SmartFusion2_MSS_HPDMA_Driver + 2.0.101 + SmartFusion2 microcontroller subsystem (MSS) High Performance DMA bare metal software driver. + +This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly. + SmartFusion2_MSS_HPDMA_Driver_0 + + + IP + FirmWareModule + Actel + Firmware + SmartFusion2_MSS_MMUART_Driver + 2.0.101 + SmartFusion2 microcontroller subsystem (MSS) MMUART bare metal software driver. + +This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly. + SmartFusion2_MSS_MMUART_Driver_0 + + + IP + FirmWareModule + Actel + Firmware + SmartFusion2_MSS_NVM_Driver + 2.0.103 + SmartFusion2 microcontroller subsystem (MSS) eNVM bare metal software driver. + +This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly. + SmartFusion2_MSS_NVM_Driver_0 + + + IP + FirmWareModule + Actel + Firmware + SmartFusion2_MSS_RTC_Driver + 2.0.101 + SmartFusion2 microcontroller subsystem (MSS) RTC bare metal software driver. + +This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly. + SmartFusion2_MSS_RTC_Driver_0 + + + IP + FirmWareModule + Actel + Firmware + SmartFusion2_MSS_System_Services_Driver + 2.0.103 + SmartFusion2 microsontroller subsystem (MSS) System Services software driver. + +This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly. + SmartFusion2_MSS_System_Services_Driver_0 + + + IP + FirmWareModule + Actel + Firmware + SmartFusion2_MSS_Timer_Driver + 2.0.101 + SmartFusion2 microcontroller subsystem (MSS) Timer bare metal software driver. + +This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly. + SmartFusion2_MSS_Timer_Driver_0 + + + Memory Map for RTOSDemo + The project contains the following subsystems: + + + CM3 + CM3 + + 1 + + + + + FIC32_REGION5 + + + 0xF0000000 + 0xF0000000 - 0xFFFFFFFF + 0x10000000 + + + DDR_0_SPACE_3 + + + 0xD0000000 + 0xD0000000 - 0xDFFFFFFF + 0x10000000 + + + DDR_0_SPACE_2 + + + 0xC0000000 + 0xC0000000 - 0xCFFFFFFF + 0x10000000 + + + DDR_0_SPACE_1 + + + 0xB0000000 + 0xB0000000 - 0xBFFFFFFF + 0x10000000 + + + DDR_0_SPACE_0 + + + 0xA0000000 + 0xA0000000 - 0xAFFFFFFF + 0x10000000 + + + FIC32_REGION4 + + + 0x90000000 + 0x90000000 - 0x9FFFFFFF + 0x10000000 + + + FIC32_REGION3 + + + 0x80000000 + 0x80000000 - 0x8FFFFFFF + 0x10000000 + + + AHB2ENVM1_REGISTERS + + + 0x600C0000 + 0x600C0000 - 0x600FFFFF + 0x00040000 + + + AHB2ENVM0_REGISTERS + + + 0x60080000 + 0x60080000 - 0x600BFFFF + 0x00040000 + + + ENVM1 + + + 0x60040000 + 0x60040000 - 0x6007FFFF + 0x00040000 + + + ENVM0 + + + 0x60000000 + 0x60000000 - 0x6003FFFF + 0x00040000 + + + FIC32_REGION1 + + + 0x50000000 + 0x50000000 - 0x5FFFFFFF + 0x10000000 + + + CACHE_BACKDOOR + + + 0x40400000 + 0x40400000 - 0x4040FFFF + 0x00010000 + + + SYSREG + + + 0x40038000 + 0x40038000 - 0x40038FFF + 0x00001000 + + RegisterMap + + 0x0 + 0x1000 + 32 + + ESRAM_CONFIG + 0x0 + 0x40038000 + 32 + R/W + 0x0 + + F2_ESRAMSIZE + 4:3 + R/W + + + + + F2_TESTESRAM1REMAP_SYNC + 2 + R/W + + + + + F2_TESTREMAPENABLE_SYNC + 1 + R/W + + + + + COM_ESRAMFWREMAP + 0 + R/W + + + + + + ENVM_CONFIG + 0x4 + 0x40038004 + 32 + R/W + 0x0 + + ENVM_SIX_CYCLE + 7 + R/W + + + + + ENVM_PIPE_BYPASS + 6 + R/W + + + + + F2_ENVMPOWEREDDOWN + 5 + R/W + + + + + COM_ENVMREMAPSIZE + 4:0 + R/W + + + + + + ENVM_REMAP_BASE + 0x8 + 0x40038008 + 32 + R/W + 0x0 + + COM_ENVMREMAPBASE + 19:0 + R/W + + + + + + ENVM_FAB_REMAP + 0xC + 0x4003800C + 32 + R/W + 0x0 + + COM_ENVMFABREMAPBASE + 19:0 + R/W + + + + + + FAB_PROT_SIZE + 0x10 + 0x40038010 + 32 + R/W + 0x0 + + COM_PROTREGIONSIZE + 4:0 + R/W + + + + + + FAB_PROT_BASE + 0x14 + 0x40038014 + 32 + R/W + 0x0 + + COM_PROTREGIONBASE + 31:0 + R/W + + + + + + MATRIX_CONFIG + 0x18 + 0x40038018 + 32 + R/W + 0x0 + + COM_WEIGHTEDMODE + 3 + R/W + + + + + COM_MASTERENABLE + 2:0 + R/W + + + + + + DSS_STATUS + 0x1C + 0x4003801C + 32 + R/W + 0x0 + + PLLLOCKLOSTINT + 10 + R/W + + + + + PLLLOCKINT + 9 + R/W + + + + + COM_ERRORSTATUS + 8:4 + R/W + + + + + BROWNOUT3_3VINT + 3 + R/W + + + + + BROWNOUT1_5VINT + 2 + R/W + + + + + WDOGTIMEOUTEVENT + 1 + R/W + + + + + RTCMATCHEVENT + 0 + R/W + + + + + + CLR_DSS_STATUS + 0x20 + 0x40038020 + 32 + R/W + 0x0 + + CLRPLLLOCKLOSTINT + 10 + R/W + + + + + CLRPLLLOCKINT + 9 + R/W + + + + + COM_CLEARSTATUS + 8:4 + R/W + + + + + CLRBROWNOUT3_3VINT + 3 + R/W + + + + + CLRBROWNOUT1_5VINT + 2 + R/W + + + + + CLRWDOGTIMEOUTEVENT + 1 + R/W + + + + + CLRRTCMATCHEVENT + 0 + R/W + + + + + + FROM_CONFIG + 0x24 + 0x40038024 + 32 + R/W + 0x0 + + SYS_TOPT + 3:0 + R/W + + + + + + IAP_CONFIG + 0x28 + 0x40038028 + 32 + R/W + 0x0 + + SYS_FCFG + 2:0 + R/W + + + + + + SOFT_INTERRUPT + 0x2C + 0x4003802C + 32 + R/W + 0x0 + + SOFTINTERRUPT + 0 + R/W + + + + + + SOFT_RESET + 0x30 + 0x40038030 + 32 + R/W + 0x0 + + PADRESETENABLE + 19 + R/W + + + + + USERRESETACTIVE + 18 + R/W + + + + + FPGA_SOFTRESET + 17 + R/W + + + + + EXT_SOFTRESET + 16 + R/W + + + + + IAP_SOFTRESET + 15 + R/W + + + + + GPIO_SOFTRESET + 14 + R/W + + + + + ACE_SOFTRESET + 13 + R/W + + + + + I2C1_SOFTRESET + 12 + R/W + + + + + I2C0_SOFTRESET + 11 + R/W + + + + + SPI1_SOFTRESET + 10 + R/W + + + + + SPI0_SOFTRESET + 9 + R/W + + + + + UART1_SOFTRESET + 8 + R/W + + + + + UART0_SOFTRESET + 7 + R/W + + + + + TIMER_SOFTRESET + 6 + R/W + + + + + PDMA_SOFTRESET + 5 + R/W + + + + + MAC_SOFTRESET + 4 + R/W + + + + + EMC_SOFTRESET + 3 + R/W + + + + + ESRAM1_SOFTRESET + 2 + R/W + + + + + ESRAM0_SOFTRESET + 1 + R/W + + + + + ENVM_SOFTRESET + 0 + R/W + + + + + + DEVICE_STATUS + 0x34 + 0x40038034 + 32 + R/W + 0x0 + + FPGAGOOD_SYNC + 6 + R/W + + + + + FPGAPROGRAMMING_SYNC + 5 + R/W + + + + + F2_PC_ACCESS_SYNC + 4:3 + R/W + + + + + VCCIBGOOD_SYNC + 2 + R/W + + + + + BROWNOUT3_3V_SYNCN + 1 + R/W + + + + + BROWNOUT1_5V_SYNCN + 0 + R/W + + + + + + SYSTICK_CONFIG + 0x38 + 0x40038038 + 32 + R/W + 0x0 + + STCLK_DIVISOR + 29:28 + R/W + + + + + STCALIB + 25:0 + R/W + + + + + + EM_MUX_CONFIG + 0x3C + 0x4003803C + 32 + R/W + 0x0 + + EM_SEL + 0 + R/W + + + + + + EM_CONFIG_0 + 0x40 + 0x40038040 + 32 + R/W + 0x0 + + EM_CSFE0 + 21 + R/W + + + + + EM_WENBEN0 + 20 + R/W + + + + + EM_RWPOL0 + 19 + R/W + + + + + EM_PIPEWRN0 + 18 + R/W + + + + + EM_PIPERDN0 + 17 + R/W + + + + + EM_IDD0 + 16:15 + R/W + + + + + EM_WRITELAT0 + 14:11 + R/W + + + + + EM_RDLATREST0 + 10:7 + R/W + + + + + EM_RDLATFIRST0 + 6:3 + R/W + + + + + EM_PORTSIZE0 + 2 + R/W + + + + + EM_MEMTYPE0 + 1:0 + R/W + + + + + + EM_CONFIG_1 + 0x44 + 0x40038044 + 32 + R/W + 0x0 + + EM_CSFE1 + 21 + R/W + + + + + EM_WENBEN1 + 20 + R/W + + + + + EM_RWPOL1 + 19 + R/W + + + + + EM_PIPEWRN1 + 18 + R/W + + + + + EM_PIPERDN1 + 17 + R/W + + + + + EM_IDD1 + 16:15 + R/W + + + + + EM_WRITELAT1 + 14:11 + R/W + + + + + EM_RDLATREST1 + 10:7 + R/W + + + + + EM_RDLATFIRST1 + 6:3 + R/W + + + + + EM_PORTSIZE1 + 2 + R/W + + + + + EM_MEMTYPE1 + 1:0 + R/W + + + + + + CLK_CTRL + 0x48 + 0x40038048 + 32 + R/W + 0x0 + + GLBDIVISOR + 13:12 + R/W + + + + + RTCIF_ACMDIVISOR + 11:8 + R/W + + + + + ACLKDIVISOR + 7:6 + R/W + + + + + PCLK1DIVISOR + 5:4 + R/W + + + + + PCLK0DIVISOR + 3:2 + R/W + + + + + RMIICLKSEL + 1 + R/W + + + + + + CCC_DIV_CONFIG + 0x4C + 0x4003804C + 32 + R/W + 0x0 + + OCDIVRST + 22 + R/W + + + + + OCDIVHALF + 21 + R/W + + + + + OCDIV4 + 20 + R/W + + + + + OCDIV3 + 19 + R/W + + + + + OCDIV2 + 18 + R/W + + + + + OCDIV1 + 17 + R/W + + + + + OCDIV0 + 16 + R/W + + + + + OBDIVRST + 14 + R/W + + + + + OBDIVHALF + 13 + R/W + + + + + OBDIV4 + 12 + R/W + + + + + OBDIV3 + 11 + R/W + + + + + OBDIV2 + 10 + R/W + + + + + OBDIV1 + 9 + R/W + + + + + OBDIV0 + 8 + R/W + + + + + OADIVRST + 6 + R/W + + + + + OADIVHALF + 5 + R/W + + + + + OADIV4 + 4 + R/W + + + + + OADIV3 + 3 + R/W + + + + + OADIV2 + 2 + R/W + + + + + OADIV1 + 1 + R/W + + + + + OADIV0 + 0 + R/W + + + + + + CCC_MUX_CONFIG + 0x50 + 0x40038050 + 32 + R/W + 0x0 + + MODE + 31:30 + R/W + + + + + EN + 29 + R/W + + + + + GLMUXCFG1 + 27 + R/W + + + + + GLMUXCFG0 + 26 + R/W + + + + + GLMUXSEL1 + 25 + R/W + + + + + GLMUXSEL0 + 24 + R/W + + + + + BYPASS_PLL3 + 22 + R/W + + + + + OCMUX2 + 21 + R/W + + + + + OCMUX1 + 20 + R/W + + + + + OCMUX0 + 19 + R/W + + + + + DYNCSEL + 18 + R/W + + + + + RXCSEL + 17 + R/W + + + + + STATCSEL + 16 + R/W + + + + + BYPASS_PLL2 + 14 + R/W + + + + + OBMUX2 + 13 + R/W + + + + + OBMUX1 + 12 + R/W + + + + + OBMUX0 + 11 + R/W + + + + + DYNBSEL + 10 + R/W + + + + + RXBSEL + 9 + R/W + + + + + STATBSEL + 8 + R/W + + + + + BYPASS_PLL1 + 6 + R/W + + + + + OAMUX2 + 5 + R/W + + + + + OAMUX1 + 4 + R/W + + + + + OAMUX0 + 3 + R/W + + + + + DYNASEL + 2 + R/W + + + + + RXASEL + 1 + R/W + + + + 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+ + + + F2_LARGE_CT_XS + 4 + R/W + + + + + FAB_APB32 + 3 + R/W + + + + + FAB_AHBIF + 2 + R/W + + + + + F2_AHBCAPABLE + 1 + R/W + + + + + FAB_AHB_BYPASS + 0 + R/W + + + + + + APB_EXTN + 0x70 + 0x40038070 + 32 + R/W + 0x0 + + APB16_XHOLD + 15:0 + R/W + + + + + + LOOPBACK_CTRL + 0x74 + 0x40038074 + 32 + R/W + 0x0 + + DSS_EMACLOOPBACK + 4 + R/W + + + + + DSS_GPIOLOOPBACK + 3 + R/W + + + + + DSS_I2CLOOPBACK + 2 + R/W + + + + + DSS_SPILOOPBACK + 1 + R/W + + + + + DSS_UARTLOOPBACK + 0 + R/W + + + + + + IO_BANK_CONFIG + 0x78 + 0x40038078 + 32 + R/W + 0x0 + + BTWEST + 3:2 + R/W + + + + + BTEAST + 1:0 + R/W + + + + + + GPIN_SRC_SEL + 0x7C + 0x4003807C + 32 + R/W + 0x0 + + DSS_GPINSOURCE[15] + 15 + R/W + + + + + DSS_GPINSOURCE[14] + 14 + R/W + + + + + DSS_GPINSOURCE[13] + 13 + R/W + + + + + DSS_GPINSOURCE[12] + 12 + R/W + + + + + DSS_GPINSOURCE[11] + 11 + R/W + + + + + DSS_GPINSOURCE[10] + 10 + R/W + + + + + DSS_GPINSOURCE[9] + 9 + R/W + + + + + DSS_GPINSOURCE[8] + 8 + R/W + + + + + DSS_GPINSOURCE[7] + 7 + R/W + + + + + DSS_GPINSOURCE[6] + 6 + R/W + + + + + DSS_GPINSOURCE[5] + 5 + R/W + + + + + DSS_GPINSOURCE[4] + 4 + R/W + + + + + DSS_GPINSOURCE[3] + 3 + R/W + + + + + DSS_GPINSOURCE[2] + 2 + R/W + + + + + DSS_GPINSOURCE[1] + 1 + R/W + + + + + DSS_GPINSOURCE[0] + 0 + R/W + + + + + + + + + RTC + + + 0x40017000 + 0x40017000 - 0x40017FFF + 0x1000 + + + COMBLK + + + 0x40016000 + 0x40016000 - 0x40016FFF + 0x1000 + + + HDMA + + + 0x40014000 + 0x40014000 - 0x40014FFF + 0x1000 + + + GPIO + + + 0x40013000 + 0x40013000 - 0x40013FFF + 0x1000 + + + H2FINTERRUPT + + + 0x40006000 + 0x40006000 - 0x40006FFF + 0x1000 + + + TIMER + + + 0x40004000 + 0x40004000 - 0x40004FFF + 0x1000 + + + MMUART_0 + + + 0x40000000 + 0x40000000 - 0x40000FFF + 0x1000 + + + RECYCLED_ESRAM1 + + + 0x20012000 + 0x20012000 - 0x20013FFF + 0x00002000 + + + RECYCLED_ESRAM0 + + + 0x20010000 + 0x20010000 - 0x20011FFF + 0x00002000 + + + ESRAM1 + + + 0x20008000 + 0x20008000 - 0x2000FFFF + 0x00008000 + + + ESRAM0 + + + 0x00080000 + 0x00080000 - 0x00087FFF + 0x00008000 + + + + + diff --git a/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/LiberoOutput/datasheet.xsl b/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/LiberoOutput/datasheet.xsl new file mode 100644 index 0000000000..38ca42d159 --- /dev/null +++ b/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/LiberoOutput/datasheet.xsl @@ -0,0 +1,1077 @@ + + + + + + + + + + + +
+ +
+
+
+ +
+
+
Table of Contents
+
+ Generated Files +
+ IO's +
+ Hardware Instances +
+ Firmware +
+ Memory Map + +
+
+ + +
+

+ +

Generated Files
+

+ +
+ + +
+

+ +

IO's
+

+ +
+ +
+ +
+ +
+ Cores +
+ + +
+ + +
+

+ +

Firmware
+

+ +
+ + +
+ +
+ Memory Map +
+ +
+ +
+ + + + + + + +
+

+ Data Sheet: +

+ +
+ + + +
Project Settings
+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
+ FAM: + + +
+ Die: + + +
+ Package: + + +
+ Speed Grade: + + +
+ Voltage: + + +
+ HDL: + + +
+ Project Description: + + +
+ Location: + + +
+ State (Time): + + +
+
+
+ + + + + +
+ + File set: + +
+ + +
  • + +
    • +     +
    +     +
    + +     + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + Port Name + + Direction + + Pin + + I/O Standard +
    +     + + No IO's +
    +
    +     +     + +     + + + + + + + + +
    + Software IDE: + +
    +
    + + Drivers: +
    + +     + + + +
    + +
    +
    + +
    +
    + + +
    + + + + + + + + + + + + + +
    +
    + instance list, +
    +
    +
    +     +
    + + +
    + No Firmware Generated. Design may not contain any processor subsystems, or firmware have not been downloaded to your vault +
    +
    + +
    +
    +     + + + + + + + + + + + + +
    + Instances: +
    + + + + + +
    +     +
    +
    + +
    +
    + + +
    + + + + + + + + + + + + + + + + + + + + +
    +
    + instance list, +
    +
    +
    +     +
    +     + +
    + No Instances +
    +
    + +
    +
    +     +     +     + + + + + + + + + + + + + + +
    + Type: + + +
    + Location: + + +
    + + +     + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + Type: + + +
    + Vendor: + + +
    + Library: + + +
    + Core Name: + + +
    + Version: + + +
    + Description: + + +
    + Parameters: + + +
    + + +     + + + +
    +
    + + + + + +
    +
    +     + + No parameters + +     + + + + + + + + + + +
    + Cell Type: + + +
    + + + +     + + + + + + + + + + + + + + +
    + Module Name: + + +
    + HDL File: + + +
    + + +     + + + + + Instance Name: + + + + + + + + + + + + [ ] + + + + [ ] + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + top of page + + + + + + + + +
    + +
    +
    + +
    + +     + + + + + +
  • +
    + + + +
    +
    • +     + +
    +
    + +
    +
    +
    + +
    + + +     + + +
    +

    + + + Subsystem +

    + Master(s) on this bus: + +



    + + + subsystem list, + + +

    +
    + +
    +     + + + + + + + + + + + + +
  • +
    + +
    +
    • +     + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Address Range
    Address Range
    + +
    + + + : + + + + +
    +     + + +
    +

    + + : Memory Map [ + ] + +

    +
    +
    + + range: + + +
    + + + + + back to Memory Map + +
    +
    +
    +     + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    AddressNameR/WWidthReset ValueDescription
    + + + + + + + + + + + + + + + +
    + + + + back to Memory Map + + +
    +

    + + register details [ ] : + +

    +
    +
    + + width: + -bit + +
    + + + + + + + + + + + + + + + + +
    Bit NumberNameR/WDescription
    + + + + + + + +
    + + + back to Registers + +
    +
    +     +
    +
    +     + +     + + + + + + + + + + + + + + + + +     diff --git a/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/RTOSDemo/.cproject b/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/RTOSDemo/.cproject index f15a8a3867..95eadcc36c 100644 --- a/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/RTOSDemo/.cproject +++ b/FreeRTOS/Demo/CORTEX_M2S050_Starter_Kit_SoftConsole/RTOSDemo/.cproject @@ -25,6 +25,10 @@